How and why is Security implemented?

#1

The PSoC6 has is dual ARM core microcontroller. The first core is the Cortex M0+ which is running in a secure execution environment. It uses a secure boot: the programmed firmware hash is calculated and checked against the hash which is stored in the eFuses (one-time programmable fuses), resulting in immutable code at startup. This secure boot acts as the root-of-trust. Once the code is authenticated, it starts and the security policies can be configured before the second core starts.

The second core (the Cortex M4) is running on a so called rich execution environment that facilitates the developer with high performance tasks.

Our LoRaWAN stack is utilized on the isolated M0+ core and the security policies are set up in a way that the users of our module (the developers who have access to the M4) are unable access the LoRaWAN key or code. They are also unable to modify or interfere the LoRaWAN functionality which is essential to have a ‘locked down LoRaWAN stack’.

Some modules do provide a LoRa Alliance certified LoRaWAN stack which makes LoRaWAN certification easier. However, if this stack isn’t locked down, testing is needed conform the LoRa Alliance certification to prove it’s functionality. With a ‘locked down’ stack, the LoRa Alliance certification can just be inherited which saves cost and time. This is called: LoRa Alliance Certification by Similarity.

Additional to that, our module comes with an integrated high-efficiency LoRa antenna which saves tedious RF engineering and certification costs for CE/FCC as well.

The module comes with a very easy-to-use LoRaWAN stack, Bluetooth 5.0, it uses the new SX126x Semtech radio which saves battery life and enables developers to create their LoRaWAN device with the smallest amount of time and effort possible.

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